EduMIPS64

EduMIPS64 is a free, open-source, cross-platform educational simulator for the MIPS64 instruction set architecture. Written in Java, it provides a visual debugging environment where students can write MIPS64 assembly programs and watch them flow through a 5-stage instruction pipeline in real time — observing data hazards, structural hazards, and forwarding behavior as they occur. Developed beginning in 2006 by students at the University of Catania, Italy, EduMIPS64 was born from a practical need: to complete computer architecture assignments without being locked to a Windows machine. It has since grown into a community-maintained project with users at universities on multiple continents and an experimental web interface that requires no installation at all.

History & Origins

The Problem with WinMIPS64

In the mid-2000s, computer architecture courses at many universities relied on WinMIPS64, a MIPS64 pipeline simulator created by Francesco Romano. WinMIPS64 was an effective teaching tool, but it ran only on Windows — a significant limitation for students using Linux or macOS. At the University of Catania in Sicily, Italy, a group of students decided to address this gap by building their own simulator that would run anywhere Java ran.

Development began around 2006. The initial design was inspired by WinMIPS64’s visual pipeline display — a horizontal stage diagram showing each instruction’s position in the Instruction Fetch (IF), Instruction Decode/Register Fetch (ID), Execute (EX), Memory Access (MEM), and Write-Back (WB) stages — but the codebase was written entirely from scratch in Java to ensure platform independence.

Early Development and Growth

The project was hosted on SourceForge in its early years and gradually attracted contributors from the computer architecture community. Around 2008, Andrea Spadaccini became the primary maintainer, a role he has continued to hold through the present day. Spadaccini migrated the project to GitHub, introduced modern continuous integration practices via GitHub Actions, and expanded the instruction set support significantly.

IEEE Recognition (2012)

A peer-reviewed paper describing EduMIPS64 and documenting its educational effectiveness — “Supporting Undergraduate Computer Architecture Students Using a Visual MIPS64 CPU Simulator” — was published in IEEE Transactions on Education in August 2012. The paper was authored by Davide Patti, Andrea Spadaccini, Maurizio Palesi, Fabrizio Fazzino, and Vincenzo Catania, all affiliated with the University of Catania. This publication established EduMIPS64’s academic credibility and contributed to its adoption at institutions beyond Italy.

The same year, Version 1.0 (codename: Philadelphia) was formally released, marking the project’s transition from an informal student tool to a mature, versioned open-source simulator. Version 1.0 introduced full Floating Point Unit (FPU) support, bringing it closer to the complete MIPS64 specification, along with integrated in-application HTML documentation.

Design Philosophy

EduMIPS64 is designed around a single core principle: make the invisible visible. Modern CPUs execute instructions in parallel using pipelining, speculative execution, and out-of-order techniques that are invisible to programmers working in high-level languages. EduMIPS64 deliberately exposes these mechanisms, slowing the conceptual clock so students can observe each instruction’s journey through the pipeline one cycle at a time.

Key design choices reflect this educational mission:

• Visualization over performance: The simulator’s purpose is observation, not fast execution. Its clock-cycle stepping interface prioritizes comprehensibility.
• Cross-platform accessibility: Written in Java, EduMIPS64 runs on any machine with a JVM — no architecture-specific toolchains required.
• Strict correctness: The implementation targets accuracy to the MIPS64 specification. Version 1.3.0 updated the DMULU instruction to conform to the 2014 MIPS64 Release 6 specification, demonstrating ongoing commitment to architectural fidelity.
• Multiple interfaces: A full graphical desktop UI, a command-line interface (CLI) for scripting and automation, and an experimental browser-based interface at web.edumips.org serve different contexts and preferences.

Key Features

Five-Stage Pipeline Visualization

The centerpiece of EduMIPS64’s interface is the pipeline display — a table showing each instruction currently in the pipeline alongside the stage it occupies. Students can step through a program cycle by cycle, watching instructions advance from IF through WB, and observe stalls inserted to resolve hazards.

The simulator models:

• Data hazards — RAW (read-after-write) dependencies between instructions that require stalls or forwarding
• Structural hazards — conflicts when multiple instructions need the same hardware resource simultaneously
• Control hazards — pipeline flushes caused by branch instructions
• Forwarding paths — EduMIPS64 can display when the processor forwards a result from a later pipeline stage to an earlier one to avoid a stall

Supported Instruction Set

EduMIPS64 implements a representative subset of the MIPS64 instruction set, sufficient to write meaningful programs and demonstrate all major pipeline phenomena. Supported instruction categories include:

Instructions are written using standard MIPS assembly syntax with pseudo-instructions and assembler directives:

        .data
msg:    .asciiz "Hello, World!\n"

        .code
        .global main
main:
        daddi   r14, r0, msg    ; load address of msg
        daddi   r1, r0, 4       ; syscall 4 = print string
        syscall 0               ; invoke OS print
        daddi   r1, r0, 0       ; syscall 0 = exit
        syscall 0

Floating Point Unit (FPU)

Beginning with version 1.0, EduMIPS64 includes a floating point pipeline separate from the integer pipeline. The FPU models IEEE 754 double-precision arithmetic and supports floating-point exception handling — including divide-by-zero, overflow, underflow, and invalid operation exceptions. Students can observe how FPU operations interact with integer pipeline instructions, including the additional latency cycles that floating-point operations introduce.

Register and Memory State Display

Alongside the pipeline view, EduMIPS64’s GUI displays:

• General-purpose registers (R0–R31): 64-bit integer registers shown with current values
• Floating-point registers (F0–F31): IEEE 754 double-precision values
• Special registers: PC (program counter), HI/LO (multiply/divide result registers), FCSR (floating-point control and status)
• Memory map: A scrollable view of program memory showing both code and data segments with current byte values

All displays update after each simulated clock cycle.

DineroIV Cache Simulator Integration

EduMIPS64 can produce output compatible with DineroIV, a widely-used cache simulation tool. This integration allows students to run a program in EduMIPS64, feed the resulting memory access trace into DineroIV, and experiment with different cache configurations — connecting pipeline-level behavior to memory hierarchy concepts within the same assignment flow.

Interfaces

Assembly Language and Syntax

EduMIPS64 programs are written in MIPS64 assembly syntax — a register-based, load/store architecture where arithmetic operates on registers and explicit load/store instructions move data between registers and memory.

Registers

MIPS64 defines 32 general-purpose 64-bit integer registers (R0–R31) and 32 64-bit floating-point registers (F0–F31). By convention, R0 is always zero (writes to it are discarded), and other registers follow the MIPS ABI calling convention:

Directives

EduMIPS64 supports a set of assembler directives for defining data and organizing code:

        .data                   ; begin data segment
count:  .word   42              ; 32-bit word
pi:     .double 3.14159265      ; IEEE 754 double
name:   .asciiz "MIPS64\n"     ; null-terminated string
buf:    .space  64              ; 64 bytes of uninitialized space

        .code                   ; begin code segment
        .global main            ; export symbol

Syscalls

EduMIPS64 provides a small set of system calls via the SYSCALL instruction, following the convention that R1 holds the syscall number:

Evolution

From Student Project to Maintained Open Source (2006–2012)

EduMIPS64’s first several years were characterized by iterative feature additions as student contributors rotated through the project. The codebase grew to support more of the MIPS64 ISA, gained a proper FPU pipeline, and migrated from SourceForge to GitHub. The v1.0 release in 2012 — coinciding with the IEEE paper — represented the stabilization point where the project transitioned from ongoing academic development to a sustainably maintained open-source tool.

Modernization and CLI Addition (2014–2019)

The v1.1 through v1.2.x series focused on correctness and usability. Version 1.2.8 added an experimental CLI front-end, enabling non-GUI usage for the first time. This opened EduMIPS64 to automated grading workflows and headless server environments. The series also introduced a native Windows installer, reducing the installation friction that had previously required manual JRE configuration on that platform.

Web UI and Release 6 Compliance (2023)

Version 1.3.0 (October 2023) marked the most significant update in years. The release introduced:

• A modernized desktop UI with improved layout and controls
• Simplified Chinese language support, reflecting growing adoption in East Asia
• An experimental web interface at web.edumips.org reportedly built on a compiled version of the core simulator, enabling zero-install access in any modern browser
• An update to the DMULU instruction for conformance with the MIPS64 Release 6 specification (published 2014), correcting behavior for double-word unsigned multiply

Licensing

EduMIPS64 is distributed under the GNU General Public License version 2.0 or later (GPLv2+), ensuring it remains freely available for educational use.

Current Relevance

EduMIPS64 occupies a specific and enduring niche: it is one of very few MIPS64 simulators that is cross-platform, actively maintained, and oriented toward classroom use rather than industrial emulation. Competing tools such as MARS (MIPS Assembler and Runtime Simulator) target MIPS32, not MIPS64, making EduMIPS64 effectively unique for 64-bit pipeline education.

As of version 1.3.0 (October 2023), the project is actively maintained on GitHub, with Andrea Spadaccini continuing as lead developer. The experimental web UI at web.edumips.org signals investment in accessibility rather than feature freeze. The GitHub repository uses modern CI practices, and the project accepts community contributions.

The introduction of the web interface is particularly significant for contemporary relevance: by eliminating the Java installation requirement entirely, EduMIPS64 can be used in browser-based lab environments, remote learning contexts, and institutions where students are not permitted to install software on managed machines.

MIPS64 itself has declined as an industrial architecture — MIPS Technologies sold its processor division to Imagination Technologies in 2012, and Imagination sold the MIPS business to Wave Computing in 2018 before the MIPS architecture was effectively retired from new silicon development. However, the educational value of the MIPS architecture is undiminished: MIPS64 remains a canonical example used in computer architecture textbooks precisely because of its clean, regular pipeline design. Courses using Patterson and Hennessy’s Computer Organization and Design continue to assign MIPS assembly exercises, and EduMIPS64 is a practical complement to that curriculum.

Why It Matters

EduMIPS64’s significance lies not in the assembly language it implements, but in what it makes comprehensible. The five-stage pipeline — Fetch, Decode, Execute, Memory, Write-Back — is the foundational concept of modern processor design, and it is notoriously difficult to teach through textbook diagrams alone. EduMIPS64 turns that abstraction into an interactive experience: students write a program, run it, and watch their own code stall in the Execute stage because a previous instruction hasn’t produced a value yet. The pipeline diagram stops being a diagram and starts being a description of something they caused and can fix.

The project also demonstrates what student-initiated open source can become. EduMIPS64 started as a workaround for a classroom inconvenience in 2006 — students who didn’t own Windows machines wanting to complete their assignments. Two decades later, it has an IEEE-published validation study, institutional adoption on multiple continents, and a web interface accessible from any browser. The gap between “I needed this tool for my class” and “this tool is in other people’s classes” was closed through consistent maintenance and community contribution rather than institutional backing or commercial investment.

For anyone learning computer architecture — whether following a formal curriculum or working through Patterson and Hennessy independently — EduMIPS64 provides a rare thing: a free, accurate, and genuinely illuminating window into how processors actually work.