Assembler (8080/8085)

Assembler (8080/8085) is the name Intel gave to a single assembly language shared by two processors: the 8080 of April 1974 and the 8085 of March 1976. From 1977 onward Intel stopped publishing separate manuals for them and issued one book, the 8080/8085 Assembly Language Programming Manual, whose final revision (order number 9800301-04) is dated May 1981. That manual is the definitive statement of the language. It documents a mnemonic set that is almost entirely the 8080’s — MOV, MVI, LXI, DAD, JNZ, CALL, RET — plus exactly two instructions that exist only on the 8085, and it wraps them in a full macro assembler with conditional assembly, relocation and module linkage.

History and Origins

From the 8008 to the 8080

Intel’s first 8-bit processor, the 8008 of 1972, used the instruction set of the Datapoint 2200 terminal. It was slow, and its 18-pin package forced addresses and data to share pins. Federico Faggin, who had led the 4004 design and became the primary architect of the 8080, proposed a successor in the spring of 1972, and Intel’s management approved the project that autumn. In November 1972 Faggin brought Masatoshi Shima over from Japan to do the detailed logic and circuit design, and Stanley Mazor also worked on the architecture.

Shima finished the layout in August 1973, production began in December, and a working NMOS prototype was ready in January 1974. The 8080 had a 40-pin package, a 16-bit address bus covering 64 KB of memory, a stack in external memory and TTL-compatible signals. Its launch advertisement, in the 15 April 1974 issue of Electronic News, was headlined “From CPU to software, the 8080 Microcomputer is here.”

The 8080 cannot run 8008 binaries. The opcodes were reassigned and the mnemonics redesigned, so the 8008’s LAB became the 8080’s MOV A,B. Intel still presented the 8080 as the 8008’s successor at the source level: its September 1975 8080 Microcomputer Systems User’s Manual says programs written for the 8008 can be assembled and executed on the 8080.

One instruction set, two chips

The 8080 established the register model and the mnemonics. The 8085, introduced in March 1976, was a repackaging rather than a redesign: a single +5 V supply instead of the 8080’s +5, −5 and +12 V, an on-chip clock generator and system controller that replaced the external 8224 and 8228, four new interrupt pins and a pair of serial data pins. Intel’s manual is blunt about what this means for the programmer: “The differences between the 8080 processor and the 8085 processor will be more obvious to the system designer than to the programmer. Except for two additional instructions, the 8085 instruction set is identical to and fully compatible with the 8080 instruction set.”

The two added instructions are SIM (Set Interrupt Mask) and RIM (Read Interrupt Mask), and both are multi-purpose. SIM writes an interrupt mask taken from the accumulator and can also send one bit out on the serial output pin; RIM reads the mask, the pending-interrupt state and one bit from the serial input pin back into the accumulator. Because each executes in four clock states against the ten the manual gives for IN and OUT, the serial pins can be driven and sampled in less than half the time of a port access. Intel’s instruction-summary diagrams mark them simply “8085 ONLY”.

Where the language was written down

The combined manual carries the copyright line “Copyright © 1977, 1978, 1979, 1981 Intel Corporation”, so the merged edition dates from 1977, the year Intel was also shipping the MCS-85 System Design Kit (the SDK-85 User’s Manual is dated July 1977) and the ICE-85 in-circuit emulator, which Electronics covered on 21 July 1977. Revision C of the manual is dated November 1978 and revision -04 May 1981.

The book documents the language; the companion ISIS-II 8080/8085 Macro Assembler Operator’s Manual (9800292) documents how to invoke the assembler, its controls, and its error messages. That split matters: things the manual calls “controls” — as opposed to instructions and directives — are not part of the language proper and vary between assembler versions.

The tools of 1974–1975

Many early 8080 programs were not assembled on 8080 hardware. Programmers wrote code on a minicomputer or a time-sharing mainframe, assembled it there, and loaded the result into an Intellec development system or burned it into PROM. Intel’s March 1975 data sheet for MAC80, the MCS-80 cross assembler, describes it this way:

• It was written in ANSI standard FORTRAN IV, for “most large scale computing systems with a 32-bit or larger integer format.”
• It accepted “all 78 instruction mnemonics plus 10 pseudo-operators.”
• It allowed up to 499 labels and up to nine levels of nested conditional assembly and macro calls.
• It produced hexadecimal output for loading into an Intellec 8/Mod 80, or BNPF output for programming ROMs.

Alongside MAC80, Intel sold INTERP/80, an 8080 instruction set simulator written in FORTRAN IV (reportedly by Gary Kildall while he was consulting for Intel), and a PL/M compiler. The 8080-only 8080 Assembly Language Programming Manual reached Rev. B in February 1975 and Rev. C in January 1976; a whole chapter covers “Programming with Macros”, including ready-made macros for indirect loads and indexed addressing, which the 8080 lacks in hardware.

The 1974 mnemonics, and who owned them

Every page of instruction reference in the 1981 manual footnotes “ALL MNEMONICS © 1974, 1975, 1976, 1977 INTEL CORPORATION.” Intel’s claim to own the mnemonics is the usual explanation for why the binary-compatible Zilog Z80 shipped with an entirely different assembly syntax, and it is the reason 8085 code and Z80 code look nothing alike despite assembling to overlapping opcodes. The overlap breaks down in one place: the Z80 assigns two of its relative jumps to the opcodes the 8085 uses for RIM and SIM, so 8085 programs that touch the serial or interrupt-mask hardware cannot simply be run on a Z80.

The Language

Registers

The programming model is the 8080’s, unchanged. Seven 8-bit registers — A (the accumulator), B, C, D, E, H, L — pair up as BC, DE and HL, which Intel’s notation refers to by their first register only (B, D, H). A 16-bit stack pointer and program counter complete the picture, and the flags are Sign, Zero, Auxiliary Carry, Parity and Carry.

Sixteen-bit work is possible but limited. LXI loads a pair immediately, INX/DCX step it, DAD adds a pair to HL (and is the only 16-bit instruction that touches a flag, setting Carry), LHLD/SHLD load and store HL directly, XCHG swaps HL and DE, and XTHL exchanges HL with the top of the stack. DAD SP plus SPHL is enough to build and tear down stack frames, which is part of why PL/M and later C and Pascal compilers could target the chip at all. Subtraction of 16-bit values, comparison of signed integers, multiplication and division are all left to subroutines.

Intel made the registers specialized on purpose. HL is the only pair that can address memory in ordinary arithmetic and move instructions, through M, while BC and DE can address memory only through LDAX and STAX. Much of the craft of programming these chips is deciding which value lives in HL at each moment.

Mnemonic scheme

Intel’s mnemonics encode the addressing mode in the opcode name rather than in the operand syntax:

Conditional jumps, calls and returns work the same way: JZ, JNZ, JC, JNC, JPE, JPO, JP and JM have matching Cxx call and Rxx return forms.

One flag difference to watch

The manual records a genuine incompatibility hidden inside the “fully compatible” claim: the logical AND instructions set the Auxiliary Carry flag differently. “The 8085 logical AND instructions always set the auxiliary flag ON. The 8080 logical AND instructions set the flag to reflect the logical OR of bit 3 of the values involved.” Code that follows an ANA/ANI with DAA can therefore behave differently on the two chips. Instruction timings also differ in both directions — INR, DCR and MOV r,r are faster on the 8085, INX, DCX and stack pushes slower — and untaken conditional jumps are three clocks quicker on the 8085 because it evaluates the condition while fetching the second byte and skips the third.

Statement format

A source line has up to four fields: label or name, opcode, operand, comment. Statements are one line each with no continuations.

• A label is one to six alphanumeric characters, the first of which must be a letter, ? or @, and it ends with a colon. (SET, EQU and MACRO take a name instead, terminated by a blank rather than a colon.)
• Numeric constants take a base suffix: B binary, O or Q octal, D or nothing decimal, H hexadecimal. A hexadecimal constant must begin with a digit, hence 0BAH.
• $ is the location counter, so JMP $+6 is legal.
• ASCII constants sit in single quotes, with a doubled quote standing for one quote: DB 'TODAY''S DATE'.
• A semicolon starts a comment; a doubled semicolon starts a macro-time comment that is not reproduced when the macro expands.

Assembly-time expressions

Expressions are evaluated as unsigned 16-bit values, modulo 64K, with no overflow detection. The manual groups the operators into five families:

Compare operators yield all-ones for true and all-zeros for false, and the logical operators act on the least significant bit of the result, which makes both families natural arguments to IF. HIGH and LOW exist because the assembler treats every expression as a 16-bit address; when a relocatable or external symbol appears in an immediate instruction, one of them is mandatory, and omitting it gets you the low byte plus an error message.

Directives, relocation and macros

This is where the 8080/8085 assembler language goes well beyond the 1975 8080 manuals. Alongside EQU, SET, DB, DW, DS, ORG, IF/ELSE/ENDIF and END, the language defines a complete relocation and linkage vocabulary:

Relocatable programs are assembled relative to address zero and bound to real addresses later, so symbols acquire an extra attribute — absolute or relocatable — that constrains how they may be combined in expressions. References to the registers, PSW, SP and M are always absolute, since they name hardware.

The macro facility is equally substantial: MACRO/ENDM with LOCAL for generated labels, REPT, IRP and IRPC for repetition, EXITM for early exit, nested definitions and nested calls, plus special operators — & for concatenation, <...> to pass a parameter containing commas or blanks, % to evaluate a parameter before substitution, ! to escape a delimiter.

Code Examples

The 8-bit multiply routine below is the worked example from Chapter 6 of the manual. The 8080 and 8085 have no multiply instruction, so the routine shifts and adds: D holds the multiplicand, C the multiplier on entry, and BC holds the 16-bit product on exit.

 1
 2
 3
 4
 5
 6
 7
 8
 9
10
11
12
13
14
15
16
17
18

MULT:   MVI     B,0         ;INITIALIZE MOST SIGNIFICANT BYTE
                            ;OF RESULT
        MVI     E,9         ;BIT COUNTER
MULT0:  MOV     A,C         ;ROTATE LEAST SIGNIFICANT BIT OF
        RAR                 ;MULTIPLIER TO CARRY AND SHIFT
        MOV     C,A         ;LOW-ORDER BYTE OF RESULT
        DCR     E
        JZ      DONE        ;EXIT IF COMPLETE
        MOV     A,B
        JNC     MULT1
        ADD     D           ;ADD MULTIPLICAND TO HIGH-
                            ;ORDER BYTE OF RESULT IF BIT
                            ;WAS A ONE
MULT1:  RAR                 ;CARRY=0 HERE SHIFT HIGH-
                            ;ORDER BYTE OF RESULT
        MOV     B,A
        JMP     MULT0
DONE:

The two 8085-only instructions look like this. SIM takes its operand from the accumulator, with bit 3 (“mask set enable”) deciding whether the low three mask bits are honoured and bit 6 deciding whether bit 7 is sent out on the serial output pin:

 1
 2
 3
 4
 5
 6
 7
 8
 9
10

;  Enable RST 7.5 and RST 6.5, mask RST 5.5, and leave the
;  serial output pin alone.  8085 ONLY.
        MVI     A,00001001B ;MSE=1 (BIT 3) SO THE MASK BITS APPLY;
                            ;BIT 0 = 1 MASKS RST 5.5
        SIM
        EI                  ;GLOBAL INTERRUPT ENABLE

;  Read one bit from the SID pin into the carry flag.
        RIM                 ;SERIAL INPUT DATA ARRIVES IN BIT 7
        RAL                 ;ROTATE BIT 7 INTO CARRY

A relocatable module that exports one entry point and calls into another module shows the linkage directives at work:

 1
 2
 3
 4
 5
 6
 7
 8
 9
10
11
12

        NAME    DELAYS      ;module name for the linker
        PUBLIC  DELAY       ;this module exports DELAY
        EXTRN   TICKER      ;defined in some other module
        STKLN   8           ;this module needs 8 bytes of stack

        CSEG                ;relocatable code segment
DELAY:  LXI     H,TICKER    ;16-bit address, resolved at link time
        MVI     C,LOW TICKER ;LOW is required for the 8-bit form
COUNT:  DCR     C
        JNZ     COUNT
        RET
        END

Under CP/M, a minimal “Hello, World!” program calls BDOS function 9, which prints a $-terminated string addressed by DE:

 1
 2
 3
 4
 5
 6
 7
 8
 9
10
11

BDOS    EQU     5           ; CP/M BDOS entry point
PRINT   EQU     9           ; BDOS function: print string

        ORG     100H        ; CP/M programs load at 0100H
START:  MVI     C,PRINT     ; function number in C
        LXI     D,MSG       ; string address in DE
        CALL    BDOS
        RET                 ; return to the CCP

MSG:    DB      'Hello, World!$'
        END     START

Evolution

The undocumented 8085 instructions

While writing an 8085 assembler, Wolfgang Dehnhardt and Villy M. Sorensen discovered a set of opcodes that Intel had not documented, and published them as “Unspecified 8085 op codes enhance programming” in the January 1979 issue of Electronics. They are exactly the 16-bit operations the documented instruction set lacks: DSUB (HL ← HL − BC), ARHL (arithmetic right shift of HL), RDEL (rotate DE left through carry), LDHI and LDSI (DE ← HL or SP plus an 8-bit displacement), SHLX and LHLX (store and load HL through DE), RSTV (restart on overflow) and two jumps on an undocumented flag. Two extra flags, V (overflow) and UI, come with them. Stanley Mazor’s 2010 account in the IEEE Annals of the History of Computing says Intel made a late decision to leave ten of twelve new 8085 instructions undocumented so as not to complicate the 8086 then in development. At least one second source, Tundra Semiconductor, documented them anyway. Modern assemblers generally support them behind an explicit switch, because they do not exist on an 8080 and are not safe to assume on every 8085 clone.

From 8080/8085 to 8086

Intel designed the 8086’s assembly language to be reachable from this one. The register correspondence — A to AL, HL to BX, BC to CX, DE to DX — was deliberate, and Intel shipped CONV86, an ISIS-II tool whose operating instructions are dated March 1979, to convert 8080/8085 source into 8086 source. Digital Research’s XLT86 did the same job for CP/M-80 .ASM files heading to CP/M-86. Migration was at the source level, not the binary level.

The Z80 and the mnemonic split

Faggin left Intel in 1974 and co-founded Zilog, whose Z80 debuted in July 1976 and runs 8080 machine code. Zilog wrote a new and more systematic assembly syntax for the same opcodes, and for the rest of the 8-bit era CP/M software existed in two dialects that assembled to identical bytes. Zilog’s 1978 data catalog states that “all mnemonics copyright Intel Corporation 1977”. Some assemblers, such as Macroassembler AS, accept both spellings.

Resident assemblers

As floppy-disk systems spread in the late 1970s, 8080 assembly moved from time-sharing cross assemblers to the microcomputer itself. CP/M included Digital Research’s ASM, and Digital Research later added MAC and the relocating RMAC.

A long second life as a microcontroller language

The 8085 lost the desktop to the Z80 almost immediately, but it kept selling for embedded work for another two decades. Once designed into a product — the DEC VT102 terminal, the DECtape II controller, SAIA’s PCA1 programmable logic controllers — it stayed in production for that product’s lifetime. The CMOS 80C85 extended the range further into battery-powered and space applications, and Intel did not end production until around 2000. A Russian clone, the IM1821VM85A, was reportedly still being manufactured in 2016.

Current Relevance

Nobody starts a new design on an 8085, but the language remains in unusually wide circulation:

• Teaching. The 8085 is still reported to be a standard vehicle in introductory microprocessor courses, particularly in India, largely because the instruction set is small, the manual is complete and public, and the hardware model (three maskable vectored interrupts, a non-maskable TRAP, two serial pins) is simple enough to understand in full.
• Emulation and simulators. 8085 simulators are widely used for coursework, and the TRS-80 Model 100 and DEC terminal firmware communities disassemble and patch real 8085 ROMs.
• Maintained cross assemblers. Multi-target assemblers such as Alfred Arnold’s Macroassembler AS still assemble 8080/8085 source, with an option for the undocumented 8085 opcodes.
• 8080 emulation and retrocomputing. Altair 8800 and IMSAI 8080 replicas and emulators, CP/M emulators and Space Invaders emulators all run genuine 8080 code. Writing an 8080 emulator is a popular first exercise in CPU emulation.
• Clones. Many companies second-sourced or cloned the 8080, including AMD (Am9080), NEC, National Semiconductor, Mitsubishi and Soviet manufacturers (KR580VM80A). Code for machines built on these clones, such as the Soviet Radio-86RK, is written in the same assembly language.
• Spaceflight heritage. The radiation-hardened 8085 flew on CRRES, Polar, FAST, Cluster, RHESSI, THEMIS and Sojourner, so 8085 assembly is part of the maintenance history of a generation of NASA and ESA instruments.

Why It Matters

The 8080/8085 manual is the moment a microprocessor assembly language stopped being a table of opcodes and became a documented programming system: a four-field grammar, a typed expression evaluator with a defined precedence, conditional assembly, a macro processor with parameter-escaping rules, and separate compilation with public and external symbols and a linker. Later Intel manuals for the 8086 and beyond inherited that structure almost directly.

The language also shows what backwards compatibility costs and buys. Intel added two instructions to an 8-bit processor and nothing else, documented the flag and timing differences honestly, sat on ten more instructions for strategic reasons, and gained a decade and a half of embedded design wins as a result. Code written for an Altair in 1975 would, the auxiliary-carry difference aside, still assemble and run on the processor that drove a Mars rover in 1997.