6800 Assembler

6800 Assembler is the assembly language of the Motorola MC6800, an 8-bit microprocessor announced in March 1974 and in full production by the end of that year. The 6800 was one of the first 8-bit processors designed as part of a complete system. Motorola launched it together with RAM, ROM, serial and parallel interface chips, and it ran from a single 5-volt supply at a time when most microprocessors needed three voltages. Its assembly language is compact and regular: 72 instructions, two 8-bit accumulators, a 16-bit index register and a 16-bit stack pointer. That design shaped much of what followed. Engineers who left the 6800 team created the MOS Technology 6502. Motorola’s own 6801, 6809 and 68HC11 kept the 6800 programming model going into the 21st century. Beginners also found the 6800 easy to learn, which made it a favorite of early hobby computers and microprocessor trainers.

History & Origins

A Microprocessor from a Calculator Group

Motorola’s route to the 6800 began in calculators. Tom Bennett had designed the Victor 3900, an early electronic calculator built with MOS integrated circuits. He joined Motorola in 1971 to design calculator chips and became chief architect of its microprocessor project. A first marketing study in early 1972 predicted sales of only 18,000 units over five years. Product marketer Link Young then returned with a potential order for 200,000 from National Data Corporation, enough to start design work. Bennett’s team was based in Mesa, Arizona. It included engineering director Jeff LaVell and systems designers Mike Wiles, Gene Schriber and Doug Powell. Layout of the 6800 began around December 1972, about the same time as Intel’s 8080.

The team did not treat the processor as a standalone part. LaVell’s group had surveyed customers such as Hewlett-Packard, NCR, Control Data and DEC to find functions that could become integrated circuits. To test the architecture before the chip existed, they built an equivalent circuit from 451 small-scale TTL chips spread over five circuit boards. Some accounts, including Wikipedia’s, describe the 6800 architecture as modeled on DEC’s PDP-11 minicomputer.

Launch (1974)

The first working MC6800 chips came off the line in February 1974. Electronics magazine ran a two-page story on the 6800 and its companion chips on 7 March 1974, followed by an eight-page article written by the design team on 18 April. The new single-voltage n-channel process was hard to manufacture, and full production was reached only by November 1974. Motorola matched Intel’s price of $360 for a single processor.

Motorola sold a whole development environment along with the chips. The software tools, a text editor, an assembler and a simulator, could be used on remote time-sharing computers, or customers could license the source code and run it in-house. For hardware prototyping Motorola sold the EXORciser, a desktop development system built from M6800 parts. The documentation set included two assembly language programming manuals and a 700-page applications manual that walked through the design of a point-of-sale terminal. Motorola also offered a three- to five-day design course. This “total system” approach became the standard way new microprocessors were launched.

In April 1975 Motorola brought the price of entry down with the MEK6800D1 design kit, priced at $300. It included all six chips of the family plus the application and programming manuals. Its ROM contained MIKBUG, a 512-byte monitor written by Mike Wiles. MIKBUG let a user examine and change memory, inspect registers, save and load programs on tape and run them from a terminal.

The 6502 Split

Many 6800 customers balked at the price. Chuck Peddle, who joined the team in 1973 and worked on the system design and the 6820 parallel interface chip, argued for a stripped-down, much cheaper processor. Motorola management rejected the idea. In August 1974 Peddle left for MOS Technology in Pennsylvania, and seven more Motorola engineers followed, including Bill Mensch and Rod Orgill. Their MCS6501 plugged into a 6800 socket. Their MCS6502 had its clock generator on the chip. Neither could run 6800 programs, because the team had cut the second accumulator, shrunk the stack pointer to 8 bits and designed a new instruction set.

The 6502 went on sale at WESCON in September 1975 for $25. Motorola cut the 6800’s price sharply and sued MOS Technology in late 1975. The case was settled in 1976, and MOS dropped the socket-compatible 6501. The 6502 went on to far greater volume than its parent, and it inherited several 6800 ideas: the fast 256-byte “direct page”, memory-mapped I/O and a similar flag register.

Hobby Computers and Trainers

The first personal computers using the 6800 appeared in late 1975:

• Sphere Corporation of Bountiful, Utah, advertised a 6800 kit in July 1975 and began shipping in November.
• Southwest Technical Products (SWTPC) of San Antonio officially announced the SWTPC 6800 in November 1975 as a $450 kit. It was based on the MEK6800 chip set and ran MIKBUG. It became the most successful 6800 personal computer, and its SS-50 bus attracted compatible boards and systems from Smoke Signal Broadcasting, Gimix, Midwest Scientific and others.
• MITS put the Altair 680 on the November 1975 cover of Popular Electronics. A redesign delayed deliveries of the Altair 680b until spring 1976. Microsoft supplied its BASIC, which Ric Weiland had converted from 8080 assembly to 6800 assembly.

Technical Systems Consultants (TSC) of West Lafayette, Indiana, supplied tape and then disk software for these machines, including the FLEX operating system (1976) and several assemblers and compilers. In the same year Heathkit released the ET-3400 trainer and a matching microprocessor course. They became popular with individuals and schools, because the 6800’s instruction set was easy for beginners to understand. Overall, however, 8080-based hobby systems far outsold 6800 ones.

Design Philosophy

The 6800 was designed by people who thought in terms of complete products, and its assembly language reflects that:

• Orthogonal, minicomputer-like operations. Most arithmetic and logic instructions work the same way on either accumulator and with any memory addressing mode. The mnemonic names the register, as in LDAA/LDAB or ADDA/ADDB.
• Memory-mapped I/O. There are no IN or OUT instructions. Peripheral chips such as the 6820 PIA and 6850 ACIA appear as memory addresses and are read and written with ordinary load and store instructions.
• A full 16-bit stack. Unlike the later 6502, the 6800’s stack pointer is 16 bits wide, so the stack can sit anywhere in memory and grow as large as RAM allows.
• Big-endian addresses. Sixteen-bit values are stored high byte first, the convention Motorola kept through the 6809 and the 68000.
• Vectors at the top of memory. On reset the CPU loads the program counter from $FFFE/$FFFF. The interrupt, software-interrupt and non-maskable-interrupt vectors sit just below.

Key Features

Registers

The single index register is the language’s main bottleneck. Copying a block of memory means repeatedly saving and reloading X with source and destination addresses, a limitation the 6809 and 68HC11 later removed by adding a second index register.

Addressing Modes

Wikipedia’s count is 72 instructions across seven addressing modes, giving 197 valid opcodes. In Motorola’s terminology:

Most 6800 assemblers pick direct or extended mode automatically, depending on whether the address fits in 8 bits. There is no indirect addressing. A pointer stored in memory must first be loaded into X and then used through indexed mode.

Syntax Conventions

Motorola-style assemblers mark hexadecimal with $, binary with % and immediate values with #. Labels start in column one and comments follow a semicolon or an asterisk in column one. Directives include ORG, EQU, FCB (form constant byte), FDB (form double byte), FCC (form constant characters) and RMB (reserve memory bytes). Period listings often wrote the register as a separate field, as in LDA A or STA B. The fused forms LDAA and STAB became the common modern spelling, and the 6801 and 68HC11 kept them.

The routine below prints a zero-terminated string through a character-output routine. The address of that routine differs from one monitor or system to another:

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OUTCH   EQU  $F000      ; character-output routine (system-specific)

        ORG  $0100
START   LDX  #MSG       ; X points at the message
LOOP    LDAA 0,X        ; fetch a character
        BEQ  DONE       ; zero byte ends the string
        JSR  OUTCH      ; print it (routine must preserve X)
        INX             ; advance to the next character
        BRA  LOOP
DONE    RTS

MSG     FCC  /Hello, World!/
        FCB  $0D,$0A,0

The 6800 has no 16-bit add. Wider arithmetic is done one byte at a time, starting with the low byte, which is the second byte in big-endian storage:

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        LDAA NUM1+1     ; low bytes
        ADDA NUM2+1
        STAA SUM+1
        LDAA NUM1       ; high bytes, plus the carry
        ADCA NUM2
        STAA SUM

Interrupts and the Stack

Hardware interrupts, SWI and WAI push the entire machine state onto the stack: program counter, index register, both accumulators and condition codes. RTI restores all of it. That makes interrupt handlers simple to write, since they don’t have to save registers themselves. The cost is seven bytes of stack for every interrupt. WAI pushes the state in advance and then halts, so the registers are already saved when the interrupt arrives.

Halt and Catch Fire

With 197 documented opcodes out of 256, 59 opcodes are left undefined. In the December 1977 issue of BYTE, Gerry Wheeler reported that $9D and $DD make the processor increment its program counter endlessly, reading each address in turn until it is reset. He gave them the unofficial mnemonic HCF, for “Halt and Catch Fire.” Because the address lines then count through all of memory, the behavior is useful for testing hardware with an oscilloscope. Motorola reportedly kept it in the 6802 on purpose as a test aid, and it is believed to be the first built-in self-test feature on a Motorola microprocessor. “HCF” itself was older, one of a list of joke mnemonics said to be under development at IBM for the System/360. The 6800 was the first processor on which an undocumented HCF became widely known, and the name has since been applied to freezing opcodes on many other CPUs.

Evolution

6802 and 6808 (1977)

The MC6802, released in March 1977, added an on-chip clock oscillator and 128 bytes of RAM. It ran the same instruction set, so 6800 assembly carried over unchanged. Chips whose internal RAM failed testing were sold as the MC6808. These parts became popular in embedded systems and instruments.

6801 and 6803 (1978)

The MC6801 single-chip microcomputer combined a 6800-style CPU with RAM, ROM, a timer, parallel I/O and a serial port. It runs 6800 code and adds ten instructions. Among them are 16-bit operations that treat A and B as a combined accumulator D (LDD, ADDD, SUBD, STD), an 8×8 multiply (MUL), and PSHX/PULX for pushing and pulling the index register. It also shortened the execution time of key instructions. General Motors was the lead customer, and the first application was a trip computer for the 1978 Cadillac Seville. Hitachi’s HD6301 and HD6303 derivatives later appeared in products such as the Psion Organiser.

6809 (1978)

The MC6809 was Motorola’s most advanced 8-bit processor. It abandoned opcode compatibility with the 6800 in exchange for a second index register, a user stack pointer, a direct-page register, position-independent and reentrant code, and hardware multiplication. 6809 assemblers generally translated 6800 instructions that the 6809 did not implement directly into equivalent 6809 code, so nearly all 6800 assembly programs could be reassembled to run on the new chip. SWTPC, Gimix, Smoke Signal Broadcasting and TSC all moved their product lines to the new chip.

68HC11 (1984)

The 68HC11 microcontroller brought the 6800 lineage into CMOS. Its instruction set is backward compatible with the 6800. It adds a second 16-bit index register, Y, reached through a $18 opcode prefix, along with the 6801’s 16-bit D accumulator operations. It was used in automotive systems, barcode readers, hotel key-card writers and amateur robotics.

Current Relevance

The original MC6800 belongs to the first microprocessor era, which is why this encyclopedia lists 6800 Assembler as Historical. The language survives in several ways:

• Parts are still made. Rochester Electronics was authorized by Freescale (Motorola’s former semiconductor division) in 2014 to continue manufacturing these 8-bit parts. By the end of 2016 it was qualified and shipping the MC6802, MC6840 and MC6809.
• Maintained cross-assemblers. The portable vasm assembler by Volker Barthelmann and Frank Wille officially supports the 6800 family (6800, 6801, 6803, 68HC11). Alfred Arnold’s AS macro assembler also lists the 6800, 6801 and 68HC11 among its targets.
• Emulators. Open-source projects such as exorsim emulate Motorola’s EXORciser and the SWTPC 6800, so FLEX-era software and MIKBUG-based programs can still be run and studied.
• A living dialect. Anyone who writes assembly for a 68HC11 is writing a superset of 6800 assembly. The 6800 naming conventions, directives and big-endian habits also carried into the 6809 and Motorola’s 68000 family.

Why It Matters

6800 assembly was one of the first languages of the microprocessor age. Motorola shipped the 6800 as a complete kit of chips, assembler, simulator, development system, manuals and training course. That approach to selling a processor, rather than just the silicon, became the industry norm.

The 6800 also started a family tree. The 6502, the cheaper chip designed by people who left the 6800 team, powered the home computer boom. Motorola’s own descendants, the 6801, 6805, 6809 and 68HC11, spread through cars, instruments and embedded controllers for decades. In the hobby world, SWTPC’s machines and Heathkit’s ET-3400 taught many people how a computer works one instruction at a time. The language’s best-known quirk gave computing the phrase “Halt and Catch Fire.”